LTC2225IUH#TRPBF【PDF 7/20 页】IC ADC 12BIT 10MSPS 3V 32-QFN

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LTC2225

2225fa

APPLICATIO S I FOR ATIO

and nap modes, all digital outputs are disabled and enter

the Hi-Z state.

Grounding and Bypassing

The LTC2225 requires a printed circuit board with a clean,

unbroken ground plane. A multilayer board with an inter-

nal ground plane is recommended. Layout for the printed

circuit board should ensure that digital and analog signal

lines are separated as much as possible. In particular, care

should be taken not to run any digital track alongside an

analog signal track or underneath the ADC.

High quality ceramic bypass capacitors should be used at

the VDD, OVDD, VCM, REFH, and REFL pins. Bypass capaci-

tors must be located as close to the pins as possible. Of

particular importance is the 0.1

F capacitor between

REFH and REFL. This capacitor should be placed as close

to the device as possible (1.5mm or less). A size 0402

ceramic capacitor is recommended. The large 2.2

capacitor between REFH and REFL can be somewhat

further away. The traces connecting the pins and bypass

capacitors must be kept short and should be made as wide

as possible.

The LTC2225 differential inputs should run parallel and

close to each other. The input traces should be as short as

possible to minimize capacitance and to minimize noise

pickup.

Heat Transfer

Most of the heat generated by the LTC2225 is transferred

from the die through the bottom-side exposed pad and

package leads onto the printed circuit board. For good

electrical and thermal performance, the exposed pad

should be soldered to a large grounded pad on the PC

board. It is critical that all ground pins are connected to a

ground plane of sufficient area.

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